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Shri. O. P. Gupta, IAS





Controller General of Patents, Designs & Trade Marks, Boudhik Sampada Bhawan, Antop Hill, S. M. Road, Mumbai - 400037, India

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Semiconductor Integrated Circuits Layout Design Registry, Boudhik Sampada Bhawan, Plot No. 32, Sector-14, Dwarka, New Delhi - 110078, India

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Last Updated:December 12,2020